Method and apparatus for testing integrated circuits

Details Method and apparatus for testing integrated circuits Method and apparatus for testing integrated circuits

2002-07-01

2008-09-09

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07424658

ABSTRACT:
A technique and device for testing integrated circuits is implemented by comparing similar test outputs for differences. One particular type of integrated circuit that may benefit from this method of testing is a programmable logic integrated circuit. Separate logic units in the integrated circuit receive test patterns and generate outputs based on the test patterns. A comparator is then used to compare the outputs. If one output differs from the other outputs, an error message is created and test result information is stored in memory for use in pinpointing the cause of the error signal. In other embodiments, a microprocessor or embedded processor core may be configured to provide test patterns or used for comparison of the test pattern outputs.

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