Method and apparatus for testing digital devices using...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S742000, C714S744000, C714S700000

Reexamination Certificate

active

06993695

ABSTRACT:
A method and apparatus for testing a device using transition timestamp are used to evaluate output signals from the device. The method comprises the steps of performing timing tests on a signal from the device; and independently carrying out bit-level tests on a signal from the device. The independent timing tests and bit-level tests can be performed in parallel. The bit-level tests and apparatus comprise iteratively measuring a coarse timestamp for a transition in the signal and comparing the measured coarse timestamp to an expected timestamp to determine whether the device meets specifications. Whether the device meets specifications depends on whether, during the comparison step, the presence of a bit-level fault is detected. The apparatus and method may comprise Skew Fault detection, Bit Fault detection, No Coverage Warning detection and/or Drift Fault detection. An automatic testing system for testing devices comprises subsystems that incorporate the apparatus and method.

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patent: 6609077 (2003-08-01), Brown et al.
patent: 6661810 (2003-12-01), Skelly et al.
patent: 6675117 (2004-01-01), Adam et al.

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