Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
Reexamination Certificate
2006-04-17
2008-08-26
Ellis, Richard (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Specialized instruction processing in support of testing,...
Reexamination Certificate
active
07418581
ABSTRACT:
One embodiment of the present invention provides a system that samples instructions on a processor that supports speculative-execution. The system starts by selecting an instruction, wherein selecting an instruction involves selecting an instruction that is received from an instruction fetch unit or a deferred queue, wherein the deferred queue holds deferred instructions which are deferred because of an unresolved data dependency. The system then records information about the selected instruction during execution of the selected instruction, whereby the recorded information can be used to determine the performance of the processor.
REFERENCES:
patent: 6574727 (2003-06-01), Davidson et al.
Barnes, Ronald D. et al., “Beating in-order stalls with “flea-flicker” two-pass pipelining”, Proceedings of the 36th International Symposium on Microarchitecture, Dec. 3-5, 2003.
Caprioli Paul
Chaudhry Shailender
Yip Sherman H.
Ellis Richard
Jones Anthony P.
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
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