Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-07-30
2002-03-12
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S573000
Reexamination Certificate
active
06355571
ABSTRACT:
BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The invention relates to the fabrication of semiconductor devices and, more particularly, the invention relates to a method and apparatus for reducing the likelihood of oxidation of conductive material in a semiconductor device during its fabrication.
2. Description of the Background Art
Integrated circuits fabricated on semiconductor substrates for Ultra Large Scale Integration (ULSI) require multiple levels of conductive interconnections for electrically connecting the discrete semiconductor devices that comprise the circuits. Conventionally, the multiple levels of interconnections are separated by layers of insulating material. These interposed insulating layers have etched via holes which are used to connect one level of interconnections to another. Typically, the conductive interconnection material is aluminum, titanium, tungsten or tantalum. As device dimensions decrease and the device density increases, it is necessary to use conductive materials having lower levels of resistivity such as copper.
A well known method for creating integrated circuits such as those described above is by chemical vapor deposition (CVD). Typically, a precursor gas is mixed with a carrier gas and introduced to a deposition chamber at an elevated temperature. Upon contact with a substrate (i.e., a semiconductor wafer) within the chamber, the precursor gas decomposes into various elements and reacts with the surface to create the desired material (insulative layer, typically an oxide or conductive material such as copper) . Such processes may also be enhanced by the use of a plasma within the chamber which provides for a more uniform deposition process, i.e., when filling an opening in an oxide layer with conductive material. However, deficiencies in the CVD process create undesirable results. It has been found that between the time that a conductive material is deposited upon the substrate and an insulative or barrier layer is deposited over the conductive material, the conductive material is subjected to an oxidation reduction reaction. For example, the topmost exposed surface of a copper interconnect is reduced to copper oxide. Such surface oxides inhibit the adhesion of further material layers that are deposited thereover.
One particular method known in the art for removing native oxides from conductive interconnects is by sputtering. That is, the interconnect is exposed to a highly energetic plasma form of an inert gas (i.e., argon, xenon or the like). The highly energetic molecules of the plasma strike the oxidized surface thereby striping or sputtering away the oxide molecules. However, due to the physical nature of the sputtering act, it is difficult to prevent sputtering of small amounts of deposited copper also. Sputtering copper is undesirable because it removes required conductive material from the interconnect and it also causes cross contamination in the process chamber. Cross contamination is the condition whereby material other than what is specifically being deposited is also incorporated into a layer. For example, a partially formed semiconductor device is subjected to a sputtering step in a process chamber for removal of copper oxide from its copper interconnect. During this step, copper is also sputtered and inadvertently released into the chamber. In a following insulative layer deposition step occurring in the same chamber, the sputtered copper is deposited into the insulative layer causing cross contamination. Cross contamination may also be a condition whereby the sputtered copper is carried to other process chambers of a semiconductor wafer process system. In either situation, cross contamination is not a desirable aspect of the semiconductor device fabrication process.
Since physical sputtering is not an optimal solution, chemical removal of the native oxide is considered. One particular chemical removal method known to those skilled in the art includes the use of a hydrogen-based plasma. For example, a first plasma is formed of a hydrogen based, chemically reactive species such as ammonia (NH
3
) or hydrogen (H
2
). The reactive species chemically reacts with and reduces the oxide to form copper (Cu) and byproducts (i.e., water (H2O) and hydroxide (OH)). These byproducts are then pumped out of the process chamber and the plasma is turned Off to conclude the reduction process. Subsequently, nitride forming gases i.e., a mixture of silane SiH
4
, ammonia NH
3
and nitrogen N
2
are introduced to form a second plasma suitable for CVD of nitride. Unfortunately, adhesion is also adversely affected during this process because the silane reacts with residual water or hydroxide that was not evacuated from the chamber. Such a reaction causes an undesirable hazy film to form over the conductive interconnect. Additionally, the copper and silane thermally react to form copper silicides (CuSix) when the plasma is turned off in preparation for the next process step. Either of these films are undesirable for further deposition.
Therefore, there is a need in the art for a method of semiconductor device construction that reduces the amount of native oxide formation on the conductive material used to form the device.
SUMMARY OF THE INVENTION
The disadvantages associated with the prior art are overcome with the present invention of a method for reducing oxidation of an interface of a semiconductor device. The semiconductor device has at least a first layer and a second layer wherein the interface is disposed between said first and second layers. The method includes the steps of providing the first layer having a partially oxidized interface; introducing a hydrogen-containing plasma to the interface; and introducing second-layer-forming compounds to the hydrogen-containing plasma thereby forming a continuous plasma treatment of reduction/deposition upon the interface. The first layer further includes an insulating material having one or more conductive material devices disposed therein and the interface is defined as a generally uniform surface where the insulating material and the conductive material coincide. The conductive material makes up the oxidation of the interface. The method further comprises introducing ammonia to the interface for the step of introducing the hydrogen-containing plasma step. Such ammonia is introduced at a flow rate of approximately 50-300 sccm; the hydrogen-containing plasma is energized with a power of approximately 50-500 W and the step is performed for approximately 2-200 seconds. In a preferred embodiment of the invention, the ammonia flow rate is 75 sccm, plasma power is 150 W and the step is performed for 10 seconds.
The step of introducing second-layer-forming compounds to the hydrogen-containing plasma further comprises for example introducing silane to the interface. Such silane is introduced at a flow rate of approximately 220 sccm; the hydrogen-containing, second-layer-forming-compound introduced plasma is energized with a power of approximately 460 W and the step is performed for approximately 9 seconds. Additionally, the first two steps of the method may be performed in a first process chamber and the third step may be performed in a second process chamber instead of conducting all of the steps of the method solely in one process chamber.
An apparatus (i.e., a semiconductor device interface) in accordance with the invention comprises a first insulating layer, one or more conductive devices disposed within the insulating layer, the insulating layer and conductive devices defining the interface, wherein the interface is treated with a continuous plasma treatment to remove oxidation and deposit a second layer thereupon. The insulating layer of the interface is selected from oxides and nitrides and is preferably a nitride. The conductive material of the interface is selected from titanium, tantalum, tungsten and copper and is preferably copper. The second layer of the interface is an insulating layer that is preferably is composed of a nitride formed from plasma-enhanced CVD of silane, ammonia
Bencher Christopher Dennis
Huang Judy H.
Kim Bok Hoen
Ngai Christopher S.
Rathi Sudha
Applied Materials Inc.
Moser Patterson & Sheridan
Vu David
LandOfFree
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