Electronic digital logic circuitry – Multifunctional or programmable
Reexamination Certificate
2000-12-05
2003-06-10
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
C326S039000, C365S225700, C365S200000, C365S230030
Reexamination Certificate
active
06577156
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to fuse-programmable integrated circuits, and more particularly, to integrated circuits having a fuse-read startup sequence.
2. Description of the Related Art
Fuse-programmable integrated circuits are used in applications requiring customization and/or repair of manufacturing defects. Functional testing of integrated circuits and printed circuit boards is necessary to assure defect-free products. In many instances, it is possible to repair integrated circuits subsequent to manufacture of a wafer by providing redundant circuit elements that can be selected by fuse-programmable logic. For example, an entire column in a memory array may be replaced with a spare column, if there is a defect detected in one of the row cells that would otherwise make the memory unusable. The redundant cells make it possible to increase production yields at the cost of increased circuit area via redundant circuits and fuse electronics.
The above-mentioned fuses include electrically blown fuses (e-fuses) that may be programmed by passing a large current momentarily through a fuse, and laser programmable fuses that may be programmed by vaporizing material with a laser. An anti-fuse technology can also be implemented on an integrated circuit, where the fuse controls the gate of a transistor and the transistor conducts to produce a short when the fuse is blown.
Application-specific integrated circuits (ASICs) may include large quantities of embedded memory. The included memories typically contain redundant circuit elements in order to repair defects. The selection of replacement elements from the available redundant elements requires a large number of fuse values. For example, embedded SRAM macros within the Cu-11 ASIC design system marketed by International Business Machines Corporation contain 80 fuse values per macro instance. Therefore, an ASIC using 128 instances of a macro containing 80 fuse values will result in a total of 10,240 fuse values. Embedded dynamic random access memory (eDRAM) macro designs typically include still more fuse values. Each one megabit section of eDRAM in the Cu-11 ASIC design system contains 344 fuse values, and there may be as many as 256-1 megabit sections of eDRAM used within an ASIC design. The resulting number of fuses will be 88,064 per ASIC chip. It is desirable to reduce the number of required physical fuses to repair these integrated circuits.
In circuits designed using functional blocks or macros, such as an application-specific integrated circuit (ASIC) built from a library of macro cells, the fuses for that cell will be associated with the macro. In correcting defects or customizing these ASICs, the co-location of the fuses presents a problem in that fuses are not typically compatible with the balance of the circuitry. E-fuses require large circuit paths for the programming current so that the voltage drop produced during programming does not eliminate the ability to program the fuse, increase the programming time above acceptable limits, or increase local heating that may damage the functional electronics. Laser-programmable fuses require a large guard ring so that other circuitry is not destroyed by the laser. Additionally, present integrated circuit designs provide for “deep” stacks of circuits, allowing macros to be located below wires within layers of the die. Laser-programmed fuses and e-fuses are implemented with no wires allowed above and no circuitry allowed below the fuses, since the blowing of a fuse, whether by a laser or by an electrical means, could damage wires located over or circuitry located beneath the fuses. Finally, interconnect methods such as lead ball contact arrays are incompatible with laser blown fuses since the laser needs to have direct “line of sight” access to the fuse. Since the outer layer containing the contact array must occupy the surface layer, laser programmable fuses must be located in other areas of the die.
The inability to locate macros containing fuses underneath other wires and contact arrays or above other circuits severely limits the use of macros containing fuses. It is possible to move all of the fuses to a location where the fuses will not interfere with contact arrays, but moving fuses away from the associated macros requires custom design and either a large quantity of interconnects running from the fuses to the associated macros, or a scheme for moving the values from the fuses to their associated macros requiring a local latch and a remote latch for each fuse. A local latch is typically needed at the fuse, since the fuse cannot typically be used to form part of the logic in the integrated circuit, especially with copper fuse technology. If a potential is placed across the ends of a blown fuse, it will re-grow, forming “copper dendrites.” The blown fuse may eventually have a low enough resistance to read as if it had not been blown.
In light of the foregoing, it would be desirable to provide a method and apparatus for fuse-programming integrated circuits whereby fuses may be shared among redundant elements. Furthermore, it would be desirable to provide a method and apparatus for fuse-programming integrated circuits using fuses that do not have to be located within their associated memory macros.
SUMMARY OF THE INVENTION
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
The objective of repairing macros within integrated circuits using remotely located fuses without requiring circuit runs from a fuse to macros or local latch/remote latch pairs is achieved in a method and apparatus for initializing an integrated circuit using compressed data from a remote fusebox. Compressed control data is read from a fuse matrix and the compressed data is decoded to produce decompressed control data. Then, the decompressed control data is latched to control functional circuit elements within the integrated circuit. The invention may also be embodied in a multi-chip module where a single fusebox is used to initialize multiple dies.
The above as well as additional objectives, features, and advantages of the present invention will become apparent in the following detailed written description.
REFERENCES:
patent: 5151611 (1992-09-01), Rippey
patent: 5337278 (1994-08-01), Cho
patent: 5612631 (1997-03-01), Agrawal et al.
patent: 5659551 (1997-08-01), Huott et al.
patent: 5668818 (1997-09-01), Bennett et al.
patent: 5789970 (1998-08-01), Denham
patent: 5859801 (1999-01-01), Poechmueller
patent: 5987632 (1999-11-01), Irrinki et al.
patent: 6084803 (2000-07-01), Sredanovic et al.
patent: 6115300 (2000-09-01), Massoumi et al.
patent: 6353570 (2002-03-01), Hwang et al.
Anand Darren L.
Barth, Jr. John Edward
Fifield John Atkinson
Gillis Pamela Sue
Jakobsen Peter O.
Bracewell & Patterson L.L.P.
Henkler Richard A.
International Business Machines - Corporation
Tan Vibol
Tokar Michael
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