Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-11-06
2010-12-14
Ton, David (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S761010
Reexamination Certificate
active
07853851
ABSTRACT:
A system that detects degradation in an integrated circuit chip. During operation, the system monitors a pair of pins on the integrated circuit chip and in doing so, generates a time series of parameters for the pins. The system then determines whether the time series of parameters indicates that the integrated circuit chip has degraded. If so, the system generates a signal indicating that the integrated circuit chip has degraded.
REFERENCES:
patent: 4625286 (1986-11-01), Papamichalis et al.
patent: 5600578 (1997-02-01), Fang et al.
patent: 5734975 (1998-03-01), Zele et al.
patent: 7106088 (2006-09-01), Tsai et al.
patent: 7220990 (2007-05-01), Aghababazadeh et al.
patent: 2007/0132523 (2007-06-01), Newman
Beckman Daniel J.
Cross Kenny C.
Oracle America Inc.
Park Vaughan Fleming & Dowler LLP
Ton David
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