Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
1998-03-09
2001-06-12
Heckler, Thomas M. (Department: 2182)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C710S058000
Reexamination Certificate
active
06247136
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to computer systems, and more specifically, to providing an interface between a source synchronous component and a non-source synchronous component in a computer system to capture the data from the non-source synchronous component in the source synchronous component.
BACKGROUND OF THE INVENTION
Many prior art computer systems are common clocked systems where multiple components within the system are driven by a common clock signal. In such systems components such as processors and cache memories are driven by a common clock signal, which is used to synchronize communication between components. However, as operating frequencies have increased, clock skew caused by distribution of the clock signal within the system has become a limiting factor.
In order to overcome the limitations caused by clock skew in common clocked systems, processors have been designed with source synchronous interfaces that send and receive timing information in the form of strobe signals along with data. These strobe signals are used to drive the components receiving the data. However, in order to provide a functional computer system, other components, such as cache memories must be redesigned to communicate in a source synchronous manner, which increases development time and costs associated with the computer system.
Therefore, what is needed is the ability to allow a source synchronous component to capture data received from a non-source synchronous component and thereby communicate with the non-source synchronous component. The present invention provides such a capability.
SUMMARY OF THE INVENTION
An interface between a source synchronous component and a non-source synchronous component that provides a source synchronous signaling scheme is described. A timing generation circuit in the source synchronous component provides timing information to the non-source synchronous component. A delay element delays a strobe signal from the timing generation circuit such that the strobe signal is received at the interface when data requested from the non-source synchronous component is valid at the interface.
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“IEEE Standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI)” Published by the Institute of Electrical and Electronics Engineers, Inc., Jul. 31, 1996, pp. 1-30.
MacWilliams Peter D.
Mozdzen Thomas J.
Muljono Harry
Blakely , Sokoloff, Taylor & Zafman LLP
Heckler Thomas M.
Intel Corporation
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