Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-02-23
2000-07-25
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438291, 438299, 438300, 438303, 438304, H01L 21336
Patent
active
060936126
ABSTRACT:
A Metal Oxide Silicon Field Effect Transistor (MOSFET) and method includes a gate electrode pattern formed over a gate insulation layer on a semiconductor substrate. A pair of first impurity regions are respectively formed in an upper side surface of the substrate and adjacent to a side of the gate electrode pattern. A pair of first side wall spacers are respectively formed adjacent to a side wall of the gate electrode pattern, and a pair of air gaps are respectively formed between the gate electrode pattern and each of the side wall spacers. The MOSFET and method solve an increase problem of a fringing capacitor between a source and a gate electrode by forming an air gap along a side of the gate electrode. Further, a semiconductor chip area becomes decreased by forming a source and drain in a vertical structure. The source and drain formed of a side wall spacer further prevents a short channel effect from occurring. In addition, a cost reduction is achieved by adopting a self-alignment process.
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patent: 5869374 (1999-02-01), Wu
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Duong Khanh
Jr. Carl Whitehead
LG Semicon Co. Ltd.
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