Metal and metal silicide nitridization in a high density,...

Details Metal and metal silicide nitridization in a high density,... Metal and metal silicide nitridization in a high density,...

1997-06-24

2001-04-24

Bowers, Charles (Department: 2873)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C438S683000, C438S649000, C438S651000, C438S655000

Reexamination Certificate

active

06221792

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to nitridization of a metal or metal silicide layer to form a metal nitride or metal silicon nitride barrier layer in a contact hole or a via of an integrated circuit (IC). More particularly, the present invention relates to nitridization of a metal or metal silicide layer in a high density, low pressure plasma system to form a metal nitride or metal silicon nitride barrier layer having a substantially uniform composition along a depth of a contact hole or a via of an integrated circuit (IC).
In the semiconductor fabrication art, (e.g., the fabrication of integrated circuits or flat panel displays from substrates) refractory metal nitrides, e.g., titanium nitride (TiN), and refractory metal silicon nitrides, e.g., tungsten silicon nitride (W—Si—N), are commonly employed as barrier layer materials inside a contact hole or a via. Contact holes and vias are openings that are typically formed in a dielectric layer, such as a silicon dioxide layer. By way of example,
FIG. 1A
shows a partially fabricated integrated circuit
10
including a contact hole
16
, which is formed by etching through a silicon dioxide layer
14
(hereinafter referred to as “oxide layer
14
”) to provide an opening to an underlying substrate layer
12
. In subsequent IC fabrication steps, contact hole
16
may be filled with conductive materials such as tungsten, copper or aluminum, to ultimately form contact plugs that provide a conductive pathway between an IC substrate and, for example, a polysilicon layer disposed above the IC substrate.
Vias are similarly formed and filled to provide conductive pathways between successive layers of metallization disposed above the IC substrate.
Before the contact hole or via is filled with conductive material, a barrier layer may be fabricated to prevent the diffusion of conductive material such as aluminum from the conductive into the silicon substrate layer. By way of example, a barrier layer conformally deposited on the surface of IC
10
, partially fills contact hole
16
and effectively prevents the diffusion of particles from subsequently deposited aluminum metal into silicon substrate layer
12
. It is well known in the art that the ingress of such conductive particles into the silicon substrate layer can increase the conductivity of the silicon substrate layer and lead to catastrophic device failures.
Traditionally, such barrier layers have been fabricated on IC surfaces by the well known technique of chemical vapor deposition (CVD). Briefly, in chemical vapor deposition (CVD), a chemical containing atoms of the material to be deposited reacts with another chemical to produce the desired material on the substrate surface while the byproducts of the reaction are removed from the reaction chamber.
Fabrication of a titanium nitride (TiN) barrier layer, for example, may begin when partially fabricated IC
10
of
FIG. 1A
is secured on a chuck in a deposition chamber. Next, an inert atmosphere is created in the deposition chamber, where the substrate may be maintained at a high enough temperature, e.g., about 400° C., to provide the necessary energy for the reactant gases to react and deposit on the substrate surface. Next, the reactant gases, which include ammonia (NH
3
), hydrogen (H
2
) and organometallic gases containing titanium (Ti) gas may be introduced into the chamber. Such conditions are maintained inside the CVD chamber for so long as it is required to deposit a TiN layer of appropriate thickness.
A CVD process for fabricating a barrier layer, such as a TiN layer, suffers from several drawbacks, however. By way of example, CVD of a barrier layer subjects the IC substrate to high temperatures, which require a high thermal budget and are often incompatible with low temperature metal alloys, such as aluminum alloys, inside an IC. As a further example, the use of organometallic gases make it likely that there may be carbon inclusion in the TiN barrier layer, thereby undesirably lowering the conductivity of the barrier layer and contact plug. Fabrication of a barrier layer by CVD, therefore, also runs the risk of rendering the IC inoperable.
To remedy these problems, the barrier layer is currently fabricated by reactive sputtering.
FIG. 1B
shows a reactor system
100
typically employed for carrying out reactive sputtering to fabricate a barrier layer. Reactor
100
includes a chamber
108
, in which a partially fabricated IC
10
, also shown in
FIG. 1A
, is disposed above a chuck
102
. Inside chamber
108
, an electrically biased metal target
106
is mounted above chuck
102
. The composition of metal target
106
usually depends on the kind of barrier layer that is to be formed. If a TiN barrier layer is to be fabricated, for example, then metal target
106
may include titanium (Ti). Chamber
108
may also come fitted with a gas inlet
110
and outlet (not shown to simplify illustration). Gas inlet
110
is designed to supply reactive gases inside chamber
108
and gas outlet may be designed to evacuate gaseous byproducts from chamber
108
.
A typical reactive sputtering process in reactor
100
of
FIG. 1B
begins when partially fabricated IC
10
is secured on chuck
102
. Vacuum conditions are then created in chamber
108
, before a reactive gaseous mixture including argon (Ar) and nitrogen (N
2
) is introduced into chamber
108
via gas inlet
110
. Next, the reactive gas is ionized by a radio frequency generator, for example, producing positively charged nitrogen and argon ions. The argon ions are attracted and accelerate towards target
106
, which is bombarded with the radio frequency-excited argon ions. Consequently, some atoms and molecules are “knocked off” target layer
106
and the dislodged target material, e.g. titanium ions, reacts with the nitrogen ions in the gas phase to produce metal nitride (e.g. TiN), which deposits on substrate
104
and forms the barrier layer.
Unfortunately, the reactive sputtering process described above also has several drawbacks. By way of example, it is difficult to sputter deposit a barrier layer of uniform composition throughout the depth of the contact hole or via, as the IC technology moves to smaller critical dimensions, e.g. on the order of 0.35 &mgr;m to 0.13 &mgr;m or smaller, and greater feature depth, e.g. approaching 3 &mgr;m in some instances. Contact holes and vias realized in this technology have aspect ratios as high as about 4:1 and about 5:1. For such high aspect ratios, the collision frequency between the nitrogen and titanium ions varies along the depth of the contact hole or via. By way of example, the collision frequency between the nitrogen and titanium ions near the top of contact hole
16
of
FIG. 1A
will be different than that near the bottom or some distance below the top of the contact hole. As a result, the reaction rate of forming the barrier layer will vary along the depth of contact hole
16
of FIG.
1
A. The resulting barrier layer has a nonuniform composition, i.e. nitrogen and titanium ions are present in the barrier layer composition in different stoichiometric ratios, throughout the depth of the contact hole. Barrier layers with nonuniform composition throughout the depth of the contact hole are undesired for many reasons. By way of example, those skilled in the art will recognize that the performance of a barrier layer with nonuniform composition will be unpredictable. It is likely that the barrier layer composition over some areas of the contact hole will not effectively prevent diffusion of conductive particles, such as aluminum metal particles, into the substrate layer, thereby making the IC more susceptible to device failure.
As another example, the reactive sputtering process described above suffers from poor repeatability, i.e. the composition of the barrier layer fabricated in the contact holes or vias of few initial ICs will be different from that fabricated in the contact holes or vias of subsequent ICs. The barrier layer composition changes because the metal target layer in the reactor chamber under

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