Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-09-10
2000-10-31
Smith, Matthew
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438197, 438211, 438264, 438488, 257314, 257315, 257321, 257324, H01L 21336
Patent
active
061401811
ABSTRACT:
A memory cell provides point defect trap sites in an insulator for storing data charges. Single electrons are stored on respective point defect trap sites and a resulting parameter, such as transistor drain current, is detected. By adjusting the density of the point defect trap sites, more uniform step changes in drain current are obtained as single electrons are stored on or removed from respective trap sites. By also adjusting the trapping energy of the point defect trap sites, the memory cell provides either volatile data storage, similar to a dynamic random access memory (DRAM), or nonvolatile data storage, similar to an electrically erasable and programmable read only memory (EEPROM). The memory cell is used for storing binary or multi-state data.
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Forbes Leonard
Geusic Joseph E.
Keshaven B.V.
Micro)n Technology, Inc.
Smith Matthew
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