Memory I/O buffer using shared read/write circuitry

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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C365S196000, C365S189011

Reexamination Certificate

active

06879524

ABSTRACT:
A memory input-output (IO) buffer is provided, which includes a bit line, a data input-output line and a combined sense amplifier and write driver. The combined sense amplifier and write driver is coupled to the data input-output line and the first bit line and shares the same physical area on an integrated circuit.

REFERENCES:
patent: 5132928 (1992-07-01), Hayashikoshi et al.
patent: 5500820 (1996-03-01), Nakaoka
patent: 5661729 (1997-08-01), Miyazaki et al.

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