Memory diagnosis test circuit and test method using the same

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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C365S201000

Reexamination Certificate

active

07747914

ABSTRACT:
According to an example embodiment, a memory diagnosis test circuit may include a memory core block, a word line selector, a bit line selector, and/or an analog mode control unit. The memory core block may include a plurality of memory cells. The word line selector may be configured to select one of a plurality of word lines of the memory core block using a first shift register. The bit line selector may be configured to select one of a plurality of bit line pairs of the memory core block using a second shift register. The analog mode control unit may be configured to monitor data corresponding to the selected word line and bit line pair.

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Office Action dated Dec. 17, 2008 for corresponding Korean Application No. 2007-0002176.

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