Memory device with fast write recovery and related write recover

Details Memory device with fast write recovery and related write recover Memory device with fast write recovery and related write recover

1997-03-12

1998-07-07

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Precharge

365204, 365202, 365205, G11C 700

Patent

active

057779350

ABSTRACT:
A memory (10) such as a current sensing static random access memory (SRAM) achieves fast write recovery through bit line loads and two additional mechanisms. First, an additional load (252) on shared data lines also becomes active to speed the write recovery process. Second, multiple columns (200, 202, 204) are connected to common data lines during write recovery so that a column written to during a write cycle may be again precharged in part by charge sharing using the charge stored in other columns. These two mechanisms allow fast write recovery with minimum column pitch and avoid the problems which would be encountered if the loads were placed on the write data line.

REFERENCES:
patent: 4110840 (1978-08-01), Abe et al.
patent: 5043945 (1991-08-01), Bader
patent: 5416744 (1995-05-01), Flannagan et al.
Kiyofumi Ochii et al., "An Ultralow Power 8K .times.8-Bit Full CMOS RAM with a Six-Transistor Cell", IEEE Journal of Solid-State Circuits, vol. SC-17, No. 5, Oct. 1992, pp. 798-801.

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