4. Static information storage and retrieval
  5. Addressing
  6. Plural blocks or banks

Wai T. Lau

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Memory data bus architecture and method of configuring multi-wid

Static information storage and retrieval – Addressing – Plural blocks or banks
Patent

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Memory device with fast write recovery and related write recover

Static information storage and retrieval – Read/write circuit – Precharge
Patent

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Self resetting high speed redundancy circuit and method thereof

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1294295

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