Memory device and fabrication method thereof

Details Memory device and fabrication method thereof Memory device and fabrication method thereof

2005-04-05

2005-04-05

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S386000

Reexamination Certificate

active

06875654

ABSTRACT:
A memory device and fabricating method thereof. In the memory device of the present invention, a substrate has a plurality of deep trenches, wherein the deep trenches formed in the adjacent rows are staggered. A deep trench capacitor and a control gate are disposed in each deep trench successively. Word lines are disposed on the control gates respectively, and each word line is electrically coupled to the control gate thereunder. Diffusion regions are disposed in the substrate and surrounding the deep trenches respectively to serve as sources of vertical transistors. Each diffusion region is electrically connected to the surrounding deep trench capacitor. Active areas are disposed on the rows of the control gates respectively along a second direction. The regions where each active area overlaps the control gates have at least one indentation.

REFERENCES:
patent: 5498564 (1996-03-01), Geissler et al.
patent: 6762447 (2004-07-01), Mandelman et al.
patent: 6784477 (2004-08-01), Jang

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