Memory circuit and method for sensing data

Static information storage and retrieval – Read/write circuit – Precharge

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36518902, 36518909, G11C 700

Patent

active

057540101

ABSTRACT:
A memory circuit (24) includes a sense amp circuit (30) that uses multiplexers (86) in a column mux (32) for pre-charging only selected bitlines in order to limit the current during a read operation of the FLASH memory circuit (24). The sense amp circuit (30) provides the bitline with a pre-charge voltage that is set by a current reference (68) that is substantially supply independent. In the read mode the sense amp circuit (30) responds to either a voltage on the bitline that is lowered from the pre-charge voltage value by a selected programmed memory cell (40) or by a voltage that remains at the pre-charged voltage value for an unprogrammed memory cell.

REFERENCES:
patent: 5467312 (1995-11-01), Albon et al.
patent: 5557568 (1996-09-01), Miyamoto et al.
patent: 5671186 (1997-09-01), Igura
patent: 5675539 (1997-10-01), Mirabel et al.
patent: 5694362 (1997-12-01), Zhang et al.

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