Memory bit line output buffer

Details Memory bit line output buffer Memory bit line output buffer

1997-11-03

1999-05-18

Nelms, David

Static information storage and retrieval

Read/write circuit

Precharge

36523008, 36518525, 36518905, G11C7/00

Patent

active

059056843

ABSTRACT:
The present invention provides an output buffer 38 for the signal from a bit line 16 that is precharged by a precharging gate 34. The output buffer 38 comprises a stack of field effect transistors made up of an isolation transistor 40 switched by a clock signal indicating the precharge period, a precharge state driver transistor 42 and a non-precharge state driver transistor 44. The non-precharge state driver transistor 44 is connected directly between the output signal line of the output buffer and the ground. The two driver transistors 42,44 are of different polarities and are switched by the bit line signal. In operation, during the precharge period, the precharge state driver transistor 42 is disabled from changing the output of the output buffer 38 by the isolation transistor 40 whilst the non-precharge state driver transistor 44 is disabled by the transition to or maintenance of the precharge signal value on the bit line 16.

REFERENCES:
patent: 4144590 (1979-03-01), Kitagawa et al.
patent: 4397000 (1983-08-01), Nagami
patent: 5325330 (1994-06-01), Morgan
patent: 5481500 (1996-01-01), Reohr et al.
patent: 5740115 (1998-04-01), Ishibashi et al.

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