Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-05-13
2008-05-13
Wojciechowicz, Edward (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S268000, C438S494000, C438S587000, C438S694000, C438S791000, C257S328000, C257S401000
Reexamination Certificate
active
07371627
ABSTRACT:
A memory array with data/bit lines extending generally in a first direction formed in an upper surface of a substrate and access transistors extending generally upward and aligned generally atop a corresponding data/bit line. The access transistors have a pillar extending generally upward with a source region formed so as to be in electrical communication with the corresponding data/bit line and a drain region formed generally at an upper portion of the pillar and a surround gate structure substantially completely encompassing the pillar in lateral directions and extending substantially the entire vertical extent of the pillar and word lines extending generally in a second direction and in electrical contact with a corresponding surround gate structure at least a first surface thereof such that bias voltage applied to a given word line is communicated substantially uniformly in a laterally symmetric extent about the corresponding pillar via the surround gate structure.
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Wojciechowicz Edward
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