Manufacture method of semiconductor device with suppressed impur

Details Manufacture method of semiconductor device with suppressed impur Manufacture method of semiconductor device with suppressed impur

1997-06-06

2000-01-25

Quach, T. N.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438586, 438624, 438788, 438792, H01L 21336, H01L 21314

Patent

active

060177845

ABSTRACT:
A method of manufacturing a semiconductor device having fine MOS transistors includes a step of forming a MOS transistor structure on a semiconductor substrate, the MOS transistor structure having an insulated gate electrode, and a step of depositing an insulating film covering the insulated gate electrode over the semiconductor substrate, by parallel plate electrode plasma CVD using hydrogen-containing source gas under the conditions of a normalized RF power of 0.11 W/cm.sup.2 to 0.85 W/cm.sup.2 at the parallel plate electrode. A semiconductor device manufacture method is provided which can form fine MOS transistors of high reliability.

REFERENCES:
patent: 4863755 (1989-09-01), Hess et al.
patent: 5424253 (1995-06-01), Usami et al.
patent: 5550091 (1996-08-01), Fukuda et al.
patent: 5567661 (1996-10-01), Nishio et al.
Wolf, S., Silicon Processing for the VLSI Era, vol. 2, Lattice Press, 1990, pp. 279-283.

Affiliated with

Also associated with

Rating

Manufacture method of semiconductor device with suppressed impur does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Manufacture method of semiconductor device with suppressed impur, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacture method of semiconductor device with suppressed impur will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2315373