Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2000-04-29
2003-11-04
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
06643812
ABSTRACT:
TECHNICAL FIELD
This invention relates to scanning data into and out of control status register locations in a system comprising digital devices.
BACKGROUND
Boundary scanning is a way of reading and writing data into and out of control status register locations in a system comprising digital devices.
FIG. 1
shows a chain of devices. The chain includes an input port and an output port. The input port allows data to be scanned into the chain of devices. The output port allows data to be read from the chain. Each device has one or more rings. Each ring consists of one or more memory registers. Each ring provides a path for data to enter and exit the device. As data enters at one end of the ring, data leaves at the other end of the ring. Only one ring in a device can be open at a time. The combination of open rings on a group of devices constitutes a scan path.
Rings can have different lengths. The sum of the lengths of open rings is the length of the scan path. For example, in
FIG. 1
ring
25
on device
20
A could have a length of 16 bits, ring
25
in device
20
B could be 32 bits long, and ring
25
on device
20
C could be 64 bits long. The scan path length would then be 112 bits. To test these rings a 112 bit wide chain of bits is scanned in at the input port and the scan chain outputs a 112 bit wide chain of data at the output port. This normally would require successive read/write operations to accomplish the scan. This is ineffective for many diagnostic purposes because in many cases the writing of data in one ring will affect the data in another ring before it can be read, making it impossible to ascertain the state of the rings prior to the scan. According to methods of the prior art, data can be written into and read from a ring of each of multiple similar devices in the same scan chain in a single scan operation provided that the same ring in each device is open. But this is a severely limited test operation, that fails to enable an adequate diagnosis of the operation of a system.
Therefore, what is needed are systems and methods for overcoming these and other obstacles not overcome by the prior art.
SUMMARY OF THE INVENTION
The present invention provides methods and systems that overcome the obstacles not overcome by prior art methods and systems. The present invention enables a user to inject data into different rings in multiple devices in a single scan operation. The invention provides a utility buffer that enables a user to write test data to be injected into each of a plurality of rings, one ring in each of a plurality of devices. The buffer consists of a plurality of fields for entering the test data to be injected into the rings, each field corresponding to the one or more registers in the plurality of rings. The test data is injected into the registers in a single scan operation. Test data is also read from the registers in a scan operation into a set of fields, each field corresponding to a register. This enables the user to read data from all of the rings as the data existed prior to the scan. The present invention enables the user to specify, prior to the scan operation, each device and the ring within each device to be scanned in the scan operation. Thus, according to the present invention, the utility buffer comprises a memory construct of fields, each field corresponding to a different register in a ring for each ring in a device for each device in a system for one or more systems to be tested. To set up a scan operation, the user specifies the system or systems to be tested, each device within each system, and the ring within each device to be tested. The database system then associates the corresponding fields to construct a chain of fields for which the test data may be entered for each bit of each register to which the field corresponds.
These and other features and aspects of the present invention may be better understood with reference to the following figures and written description of examples.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.
REFERENCES:
patent: 5841792 (1998-11-01), Kawano et al.
patent: 6389565 (2002-05-01), Ryan et al.
patent: 6430718 (2002-08-01), Nayak
De'cady Albert
Lamarre Guy
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