LSI system of a structure requiring no additional address signal

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365230, G11C 1300, G11C 1140

Patent

active

047455810

ABSTRACT:
An LSI system is disclosed in which a plurality of status registers for indicating the internal status of the system are connected to each other so as to form a hierarchical structure and the contents of each of the remaining status registers other than one status register can be transferred to an output register through a bus, to make it possible to provide additional status registers in the system without increasing the number of address signals used and the number of pins connected to external address signal lines.

REFERENCES:
patent: 3868642 (1975-02-01), Sachs
patent: 4219883 (1980-08-01), Kobayashi et al.
patent: 4653050 (1987-03-01), Vaillancourt

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