Low temperature CVD process with selected stress of the CVD...

Details Low temperature CVD process with selected stress of the CVD... Low temperature CVD process with selected stress of the CVD...

2008-07-01

2008-07-01

Ghyka, Alexander G (Department: 2812)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

C438S199000, C438S680000, C438S780000, C257SE21316

Reexamination Certificate

active

11788523

ABSTRACT:
Device-enhancing coatings are deposited on CMOS devices by successively masking with photoresist each one of the sets of N-channel and P-channel devices while unmasking or leaving unmasked the other set, and after each step of successively masking one of the sets of devices, carrying out low temperature CVD steps with a toroidal RF plasma current while applying an RF plasma bias voltage. The temperature of the workpiece is held below a threshold photoresist removal temperature. The RF bias voltage is held at a level at which the coating is deposited with a first stress when the unmasked set consists of the P-channel devices and with a second stress when the unmasked set consists of N-channel devices.

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