Low power circuit structure with metal gate and high-k...

Details Low power circuit structure with metal gate and high-k... Low power circuit structure with metal gate and high-k...

2009-08-10

2010-10-05

Ha, Nathan W (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE27062

Reexamination Certificate

active

07807525

ABSTRACT:
FET device structures are disclosed with the PFET and NFET devices having high-k dielectric gate insulators, metal containing gates, and threshold adjusting cap layers. The NFET gate stack and the PFET gate stack each has a portion which is identical in the NFET device and in the PFET device. This identical portion contains at least a gate metal layer and a cap layer. Due to the identical portion, device fabrication is simplified, requiring a reduced number of masks. Furthermore, as a consequence of using a single layer of metal for the gates of both type of devices, the terminal electrodes of NFETs and PFETs can be butted with each other in direct physical contact. Device thresholds are further adjusted by oxygen exposure of the high-k dielectric. Threshold values are aimed for low power consumption device operation.

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