Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2000-07-14
2004-02-03
Faberyl, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S780000, C257S782000
Reexamination Certificate
active
06686652
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the packaging of small scale integrated circuits. More particularly, the invention relates to leadless leadframe package designs and manufacturing processes,
A leadless leadframe package (LLP) is a relatively new integrated circuit package design that contemplates the use of a metal (typically copper) substrate in the formation of a chip scale package (CSP). As illustrated in
FIGS. 1A and 1B
, in typical leadless leadframe packages, a copper leadframe strip or panel
10
is patterned to define a plurality of arrays or matrix
11
of chip substrate features
12
. Each chip substrate feature
12
includes a die attach pad
13
and a plurality of contacts
15
disposed about their associated die attach pad
13
. Very fine tie bars
16
are used to support the die attach pads
13
and contacts
15
.
FIG. 2
illustrates a typical resulting leadless leadframe package
14
. The die attach pad
13
supports a die
17
which is electrically connected to its associated contacts
15
by bonding wires
18
. A plastic cap
20
encapsulates the die
17
and bonding wires
18
and fills the gaps between the die attach pad
13
and the contacts
15
thereby serving to hold the contacts in place. It should be appreciated that during singulation, the tie bars
16
are cut and therefore the only materials holding the contacts
15
in place is the molding material. The resulting packaged chip can then be surface mounted on a printed circuit board or other substrate using conventional techniques.
During assembly, each die
17
of the array
11
is attached to a respective die attach pad and conventional wire bonding is used to electrically couple bond pads on each die to their associated contacts
15
on the leadframe panel
10
. After the wire bonding, the plastic cap
20
is melted and injection or transfer molded under high pressure to encapsulate and cover the top surface of the each array
11
wire bonded dice. The dice are then singulated and tested using conventional sawing and testing techniques.
Typically, as best viewed in
FIGS. 2 and 3
, the die attach pad
13
and the contacts
15
are rectangular-parallelepiped in shape, having substantially vertical smooth side walls
21
,
22
, respectively. This design is may be problematic when moisture is introduced or becomes trapped between the respective side walls
21
,
22
and the molded encapsulation cap
20
. In combination with thermal cycling, these joints may occasionally loosen, causing separation and, in the worst case scenario, product failure.
Thus, although leadless leadframe packaging has proven to be a cost effective packaging arrangement, there are continuing efforts to further improve the package structure and processing to reduce production costs, improve production efficiency and/or improve production yields. As mentioned, one issue in packaging generally is the occasional mounting failure of the die attach pads and contacts with the molded encapsulating cap. In high density packaging applications such as some of the state of the art leadless packaging, it would be advantageous to improve the structural integrity between these components.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects and according to the purpose of the present invention, an improved integrated circuit device is provided that includes a support substrate for supporting an integrated circuit die embedded in a molded encapsulating cap of an integrated circuit package. The substrate includes a conductive die attach pad adapted to be molded into the encapsulating cap. The pad includes an interior facing support surface and a spaced-apart exterior facing exposed surface defined by a peripheral edge. The support surface is adapted to support the embedded die, while the exposed surface is to be exposed from the encapsulating cap. The attach pad further includes a locking ledge portion extending outward peripherally beyond at least a portion of the exposed surface peripheral edge. This ledge is adapted to be subtended in the encapsulating cap in a manner substantially preventing a pull-out of the attach pad in a direction away from the encapsulating cap.
Thus, the molded encapsulating cap cooperates with the ledge portion of the die attach pad to prevent separation of there from. Essentially, a portion of the molded encapsulating cap engages the ledge portions to promote structural integrity.
In one embodiment, a peripheral side wall of the die attach pad tapers outwardly to the locking ledge portion from the exposed surface peripheral edge thereof. In another embodiment, the locking ledge portion extends peripherally outward from the peripheral side wall at a substantially right angle thereof.
In yet another configuration, the locking ledge portion extends substantially continuously around a substantial portion of the exposed surface peripheral edge. In still another arrangement, the exposed surface peripheral edge is four-sided forming a substantially rectangular-shaped exposed surface, and the locking ledge portion extends peripherally outward from at least two sides of the four-sided exposed surface peripheral edge.
In another aspect of the present invention, a semiconductor package includes a die attach pad having a interior support surface, an opposite exposed surface and a peripheral side wall extending between the support surface and the exposed surface. The side wall intersects the exposed surface to define a peripheral edge thereof. The attach pad further includes a locking ledge portion extending peripherally outward from the side wall, and beyond at least a portion of the exposed surface peripheral edge. A plurality of contacts are disposed about the die attach pad, each having an interior surface and an opposed, spaced-apart contact surface. The package further includes an integrated circuit die attached to the support surface of the die attach pad, and a plurality of bond pads thereon. Bond wires electrically couple the respective bond pads to the interior surfaces of associated ones of the contacts. An encapsulating cap is molded over the integrated circuit die and the contacts thereby encapsulating the bonding wires. The cap being molded such that the contact surfaces of the contacts and the exposed surface of the die attach pad remain exposed while substantially completely covering the interior surfaces of the contacts. The locking ledge portion of the die attach pad is subtended in the cap in a manner substantially preventing a pull-out of the attach pad in a direction away from the cap.
In one embodiment, each the contact includes a peripheral contact side surface extending between the interior surface and the opposed contact surface. Each contact further including a locking first shoulder portion extending peripherally outward from the side surface thereof, and beyond at least a portion of a contact surface peripheral edge, wherein the first shoulder portion of each contact is subtended in the cap in a manner substantially preventing a pull-out of the contact in a direction away from the cap.
In another embodiment, the encapsulating cap includes a cap side wall and a cap contact surface containing the pad exposed surface and the contact surfaces of the contacts. The cap contact surface and the cap side wall intersect to define a cap peripheral edge thereof. Each contact is spaced-apart along the cap peripheral edge such that a contact side wall, defined by a portion of the contact side surface and by a side wall peripheral edge thereof, remains exposed along the cap side wall. Each contact further includes a locking second shoulder portion extending peripherally outward from the contact side surface, and beyond at least a portion of the side wall peripheral edge. The second shoulder portion of each contact is subtended in the cap in a manner substantially preventing a pull-out of the contact in a direction away from the cap side.
REFERENCES:
patent: 5367196 (1994-11-01), Mahulikar et al.
patent: 5494207 (1996-02-01), Asanasavest
patent: 5508556 (1996-
Bayan Jaime
Bong Yin Yen
Hu Ah Lek
Kam Harry Cheng-Hong
Kang Aik Seng
Beyer Weaver & Thomas LLP
Faberyl Wael
Ha Nathan W.
National Semiconductor
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