Local defect memories on semiconductor substrates in a stack...

Details Local defect memories on semiconductor substrates in a stack... Local defect memories on semiconductor substrates in a stack...

2007-10-31

2010-11-09

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S002000, C714S003000, C714S006130, C714S025000, C714S030000, C714S718000, C714S723000, C714S724000, C714S733000, C714S734000, C714S742000, C365S201000, C326S039000, C716S030000

Reexamination Certificate

active

07831874

ABSTRACT:
A reconfigurable high performance computer includes a stack of semiconductor substrate assemblies (SSAs). Some SSAs involve FPGA dice that are surface mounted, as bare dice, to a semiconductor substrate. Other SSAs involve memory dice that are surface mounted to a semiconductor substrate. Elastomeric connectors are sandwiched between, and interconnect, adjacent semiconductor substrates proceeding down the stack. Each SSA includes a local defect memory and a self-test mechanism. The self-test mechanism periodically tests the SSA and its interconnects, and stores resulting defect information into its local defect memory. The computer is configured to realize a user design and then is run. A defect is then detected. If the defect is determined to be in a part of the computer used in the realization of user design, then the computer is reconfigured not to use the defective part and running of the computer is resumed, otherwise the computer resumes running without reconfiguration.

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