Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-04-23
2000-11-21
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438253, H01L 218242
Patent
active
06150209&
ABSTRACT:
A process of fabricating a capacitor structure, using a tantalum oxide capacitor dielectric layer, has been developed. The process features deposition of a thin, high dielectric constant tantalum oxide layer, followed by a high density plasma anneal procedure, used to reduce the leakage current in the as-deposited tantalum oxide layer, that can evolve during normal operating conditions of the capacitor structure. The high density plasma anneal procedure is performed in a nitrous oxide ambient, at a temperature of about 400.degree. C.
REFERENCES:
patent: 5352623 (1994-10-01), Kamiyama
patent: 5468687 (1995-11-01), Carl et al.
patent: 5622888 (1997-04-01), Sekine et al.
patent: 5641702 (1997-06-01), Imai et al.
patent: 5786248 (1998-07-01), Schuegraf
patent: 5804852 (1998-09-01), Yang et al.
Lee Jiann-Shing
Sun Shi-Chung
Ackerman Stephen B.
Saile George O.
Taiwan Semiconductor Manufacturing Company
Tsai Jey
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