Lag control

Details Lag control Lag control

2007-12-11

2007-12-11

Tran, Binh X. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S713000, C438S723000, C438S733000, C438S743000

Reexamination Certificate

active

11104733

ABSTRACT:
A method for etching features in a silicon oxide based dielectric layer over a substrate, comprising performing an etch cycle. A lag etch partially etching features in the silicon oxide based dielectric layer is performed, comprising providing a lag etchant gas, forming a plasma from the lag etchant gas, and etching the etch layer with the lag etchant gas, so that smaller features are etched slower than wider features. A reverse lag etch further etching the features in the silicon oxide based dielectric layer is performed comprising providing a reverse lag etchant gas, which is different from the lag etchant gas and is more polymerizing than the lag etchant gas, forming a plasma from the reverse lag etchant gas, and etching the silicon oxide based dielectric layer with the plasma formed from the reverse lag etchant gas, so that smaller features are etched faster than wider features.

REFERENCES:
patent: 5772906 (1998-06-01), Abraham
patent: 6380087 (2002-04-01), Gupta et al.
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patent: 6760529 (2004-07-01), Chong et al.
patent: 6828250 (2004-12-01), Annapragada et al.
patent: 2003/0029834 (2003-02-01), Lill et al.

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