Internal voltage reference for memory interface

Details Internal voltage reference for memory interface Internal voltage reference for memory interface

2006-08-22

2006-08-22

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

With test facilitating feature

C326S086000

Reexamination Certificate

active

07095245

ABSTRACT:
Embodiments of the invention include a memory controller to interface to memory. In one embodiment, the memory controller includes a pull-up calibration terminal to couple to an external pull-up resistor, a pull-down calibration terminal to couple to an external pull-down resistor, a voltage reference node, a first switch coupled between the pull-up calibration terminal and the voltage reference node, and a second switch coupled between the pull-down calibration terminal and the voltage reference node. The first switch and the second switch may be selectively closed to generate an internal voltage reference on the voltage reference node in a normal mode that may be used for comparison with an input signal to receive data.

REFERENCES:
patent: 6137720 (2000-10-01), Lancaster
patent: 6246258 (2001-06-01), Lesea
patent: 6262617 (2001-07-01), McClure
patent: 6316980 (2001-11-01), Vogt et al.
patent: 6445245 (2002-09-01), Schultz et al.
patent: 6456544 (2002-09-01), Zumkehr
patent: 6581017 (2003-06-01), Zumkehr
patent: 6617895 (2003-09-01), Zumkehr et al.
patent: 6629225 (2003-09-01), Zumkehr
patent: 6636821 (2003-10-01), Lawson
patent: 6864731 (2005-03-01), Zumkehr et al.
patent: 6918048 (2005-07-01), Zumkehr
patent: 6922077 (2005-07-01), Chandler et al.
patent: 2002/0050850 (2002-05-01), Nakamura
patent: 2003/0235084 (2003-12-01), Zumkehr et al.
patent: 2004/0123207 (2004-06-01), Zumkehr et al.
patent: 1 031 990 (2000-08-01), None
JEDEC STANDARD, DDRM SDRAM Specification, JESD79-2, Sep. 2003, JEDEC Solid State Technology Association, Electronic Industries Alliance.
JEDEC STANDARD, Double Data Rate (DDR) SDRAM Specification, JESD79C (Revision of JESD79B), Mar. 2003, JEDEC Solid State State Technology Association, Electronic Industries Alliance

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