Intermediate voltage sensor for CMOS circuits

Details Intermediate voltage sensor for CMOS circuits Intermediate voltage sensor for CMOS circuits

1995-09-07

1997-05-20

Westin, Edward P.

Electronic digital logic circuitry

With test facilitating feature

326 58, 326 60, H03K 190948, H03K 1900

Patent

active

056315759

ABSTRACT:
A built-in intermediate voltage sensor for CMOS circuits comprises a linear inverter, a first voltage control switch, a second voltage control switch, and a buffer. The linear inverter has an input end connected with an input signal under test. The first voltage control switch has a control end and an input end which are connected respectively with the input end and an output end of the linear inverter. The second voltage control switch has a control end and an input end which are connected respectively with the output end and the input end of the linear inverter. The buffer has an input end connected with the output end of the first voltage control switch and the output end of the second voltage control switch. The buffer gives forth an output voltage having a first logic value when the input signal has a voltage value of logic "0" or logic "1". The buffer is further capable of giving forth another output voltage having a second logic value when the input signal has a voltage value intermediate between logic "0" and logic "1".

REFERENCES:
patent: 3969633 (1976-07-01), Paluck et al.
patent: 4100429 (1978-07-01), Adachi
patent: 4808854 (1989-02-01), Reinagel
patent: 5373202 (1994-12-01), Armstrong, II
Jing-Jou Tang, Kuen Jong Lee and Bin Da Liu; "Built-in Intermediate Voltage Testing for CMOS Circuits"; European Design and Test Conference (Mar. 8, 1995).

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