Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-09-15
2003-05-20
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S714000, C438S719000, C134S001100, C134S001200
Reexamination Certificate
active
06566270
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of etching silicon. More specifically, the present invention relates to a method of integrating silicon etch and chamber cleaning processes.
A silicon etch process is a fundamental step in fabricating many integrated circuits. An important consideration in the etch process is repeatability since each substrate processed must have a substantially identical etch profile to conform to a precise design specification. However, the repeatability of a silicon etch process is complicated because the silicon etch process is generally a “dirty” process which generates byproducts, such as silicon dioxide, which adhere to the inner surfaces of the etch chamber. This adhesion on the inner surfaces accumulates with each successive silicon etch process and alters the chamber condition. Unless the chamber is cleaned regularly, the chamber eventually becomes dirty which may lead to poor repeatability. For example, a substrate processed at an early stage might have different etch profiles than substrates processed later when the chamber is dirty.
In order to solve these and other problems associated with the byproduct accumulation, chamber cleaning processes are regularly performed between etch processes. For example, a dry clean process may be performed after processing one to three cassettes, where each cassette contains about twenty-five substrates. The dry clean process generally involves inserting a dummy substrate into the chamber and igniting a plasma from a cleaning gas mixture within the chamber. The plasma removes the byproducts adhering to the inner surfaces of the chamber to return the chamber to a relatively clean state.
In addition to the dry clean process, a wet clean process is periodically performed, e.g., after processing every 1,500 substrates, since the dry clean process generally cannot effectively clean the entire chamber. The wet clean process involves opening the chamber and manually cleaning the chamber with solvents. This process generally takes between four to eight hours. After the wet clean process, the etch chamber is “seasoned” to obtain good repeatability. The chamber is seasoned by inserting a dummy substrate into the chamber and then igniting a plasma from a cleaning gas mixture.
As can be readily appreciated, the cleaning processes described above, particularly the wet clean process, take the etch system out of production and reduce the throughput. Accordingly, it is desirable to develop a silicon etch process that can process more substrates between wet clean steps and thereby minimize chamber down time.
SUMMARY OF THE INVENTION
The present invention provides an improved method for etching silicon. Embodiments of the invention integrate a silicon etch process with an in-situ cleaning process, so that a separate dry clean process need not be performed. The method allows more trench-etch process runs between chamber clean processes. The present invention may be used for any silicon etch process.
In one embodiment of the present invention, a method for processing a silicon substrate disposed in a substrate process chamber of the type having a source power includes transferring the substrate into the substrate process chamber. A trench is etched on the substrate by exposing the substrate to a plasma formed from a first etchant gas by applying RF energy from the source power system and biasing the plasma toward the substrate. Byproducts adhering to inner surfaces of the substrate process chamber are removed by igniting a plasma formed from a second etchant gas including a halogen source in the substrate process chamber without applying bias power or applying minimal bias power. Thereafter, the substrate is removed from the chamber. At least 100 more substrates are processed with the etching-a-trench step and removing-etch-byproducts step before performing either a dry clean or wet clean operation on the chamber.
In another embodiment, a method of integrating substrate processing and chamber cleaning steps includes transferring the substrate into the process chamber. The substrate is exposed to a plasma ignited from a first process gas to etch the substrate by applying bias power to the process chamber. Etch byproducts adhering to the process chamber are removed by exposing the chamber to ions and radicals dissociated in a second plasma formed from a second process gas which includes a halogen gas, without applying bias power or by applying minimal biasing power to the process chamber. Thereafter, the processed substrate is removed from the chamber. At least 3000 more substrates are processed with the exposing-the-substrate step and removing-etch-byproducts step before performing either a dry clean or wet clean operation on the chamber.
In another embodiment, a method of forming a trench on a silicon substrate disposed in a substrate process chamber of the type having a source power includes exposing the substrate to a plasma formed from a first etchant gas by applying RF energy from a source power system. The plasma is biased toward the substrate by applying bias power to the substrate process chamber to etch the trench. A plasma is ignited from a second etchant gas consisting essentially of CF
4
, O
2
and Ar in the substrate process chamber without applying bias power or by applying minimal bias power to remove etch byproducts adhering to inner surfaces of the substrate process chamber.
These and other embodiments of the present invention, as well as its advantages and features, are described in more detail in conjunction with the text below and attached figures.
REFERENCES:
patent: 4985113 (1991-01-01), Fujimoto et al.
patent: 5158644 (1992-10-01), Cheung et al.
patent: 5522966 (1996-06-01), Komura et al.
patent: 5626775 (1997-05-01), Roberts et al.
patent: 6127278 (2000-10-01), Wang et al.
patent: 6235213 (2001-05-01), Allen, III
patent: 6318384 (2001-11-01), Khan et al.
Liu Wei
Mui David
Shen Meihua
Williams Scott
Yuen Stephen
Applied Materials Inc.
Bach Joseph
Deo Duy-Vu
Kunemund Robert
Townsend & Townsend & Crew
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