Integration film scheme for copper / low-k interconnect

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S623000, C257S758000, C257S759000

Reexamination Certificate

active

10706156

ABSTRACT:
A structure for a multi-level interconnect inter-level dielectric layer (ILD), a method of manufacturing thereof, and a semiconductor device including the ILD layer. The ILD layer includes a first low-dielectric constant material sub-layer, and a second low-dielectric constant material sub-layer disposed over the first low-dielectric constant material sub-layer. The second low-dielectric constant material sub-layer has at least one different material property than the first low-dielectric constant material sub-layer. A third low-dielectric constant material sub-layer is disposed over the second low-dielectric constant material sub-layer, the third low-dielectric constant material sub-layer having at least one different material property than the second low-dielectric constant material sub-layer. The first, second and third low-dielectric constant materials sub-layers are preferably comprised of the same material, deposited continuously in one or more deposition chambers while the deposition conditions such as the gas flow rate, power, or gas species are adjusted or changed.

REFERENCES:
patent: 5148263 (1992-09-01), Hamai
patent: 5332694 (1994-07-01), Suzuki
patent: 5372969 (1994-12-01), Moslehi
patent: 5486493 (1996-01-01), Jeng
patent: 5591677 (1997-01-01), Jeng
patent: 5616959 (1997-04-01), Jeng
patent: 5798568 (1998-08-01), Abercrombie et al.
patent: 5937324 (1999-08-01), Abercrombie et al.
patent: 5981374 (1999-11-01), Dalal et al.
patent: 6069400 (2000-05-01), Kimura et al.
patent: 6075293 (2000-06-01), Li et al.
patent: 6124198 (2000-09-01), Moslehi
patent: 6261944 (2001-07-01), Mehta et al.
patent: 6479380 (2002-11-01), Furusawa et al.
patent: 2002/0130416 (2002-09-01), Wang et al.
patent: 2004/0026785 (2004-02-01), Tomita
patent: 2004/0251549 (2004-12-01), Huang et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Integration film scheme for copper / low-k interconnect does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integration film scheme for copper / low-k interconnect, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integration film scheme for copper / low-k interconnect will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3776269

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.