Integrating n-type and p-type metal gate transistors

Details Integrating n-type and p-type metal gate transistors Integrating n-type and p-type metal gate transistors

2005-02-22

2005-02-22

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S233000, C438S585000, C438S926000

Reexamination Certificate

active

06858483

ABSTRACT:
At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.

REFERENCES:
patent: 6255698 (2001-07-01), Gardner et al.
patent: 6365450 (2002-04-01), Kim
patent: 6410376 (2002-06-01), Ng et al.
patent: 6586288 (2003-07-01), Kim et al.
patent: 20020058374 (2002-05-01), Kim et al.

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