Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-04-24
2007-04-24
Lindsay, Jr., Walter L. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S721000, C438S684000, C438S306000, C438S655000, C438S151000, C438S197000, C257SE21203, C257SE21204, C257SE21296, C257SE21593, C257SE21622, C257SE21636
Reexamination Certificate
active
11073982
ABSTRACT:
Fluorine containing regions (70) are formed in the source and drain regions (60) of the MOS transistor. A metal layer (90) is formed over the fluorine containing regions (70) and the source and drain regions (60). The metal layer is reacted with the underlying fluorine containing regions to form a metal silicide.
REFERENCES:
patent: 7060610 (2006-06-01), Lee
patent: 2001/0045605 (2001-11-01), Miyashita et al.
patent: 2004/0101999 (2004-05-01), Oda et al.
Liu Xiaozhan
Lu Jiong-Ping
Miles Donald S.
Robertson Lance S.
Yue Duofeng
Brady III W. James
Lindsay Jr. Walter L.
McLarty Peter K.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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