Integrated circuit chip with high area utilization rate

Electronic digital logic circuitry – With test facilitating feature

Reexamination Certificate

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Details

C326S101000, C326S047000, C257S048000, C438S018000

Reexamination Certificate

active

07078930

ABSTRACT:
An integrated circuit chip with a high area utilization rate includes: a plurality of logic circuits in a logic area; a first input and output circuit near a first side of the logic area for exchanging signals with the logic circuit; a second input and output circuit near a second side of the logic area for exchanging signals with the logic circuit; a plurality of first probe pads coupled to the first and the second input and output circuits for inputting or outputting signals to the first and the second input and output circuits; a corner cell comprising a plurality of wires coupled to the first and the second input and output circuits for exchanging signals between the first and the second input and output circuits; and a first process monitor circuit formed in the corner cell for monitoring a semiconductor process of the integrated circuit chip.

REFERENCES:
patent: 5944813 (1999-08-01), Trimberger
patent: 6452208 (2002-09-01), Susami

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