Input buffer using a differential amplifier

Details Input buffer using a differential amplifier Input buffer using a differential amplifier

1996-02-26

1999-09-21

Tokar, Michael J.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

326 83, H03K 520

Patent

active

059558962

ABSTRACT:
In an input circuit for semiconductor devices, such as an address buffer, an arrangement is provided which obviates the timing margin from capture of an input signal to its latching and outputting, thereby increasing the operation speed of the input circuit. The address buffer includes a differential amplifier Ai which receives an input signal Ai and outputs a pair of differential signals A-come-first-served latch circuit detects, latches and outputs one of the paired differential signals that has changed first. Activation/inactivation of the differential amplifier is done by turning on and off an N-channel MOS transistor through a Set signal. When activated, the differential amplifier generates a potential difference between the paired differential signals and, when inactivated, has its paired differential signals go low.

REFERENCES:
patent: 3757310 (1973-09-01), Croxon
patent: 4074148 (1978-02-01), Sato
patent: 4096402 (1978-06-01), Schroeder et al.
patent: 4441039 (1984-04-01), Schuster
patent: 4561702 (1985-12-01), McAdams
patent: 4937480 (1990-06-01), Higuchi et al.

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