In-situ deposition for cu hillock suppression

Details In-situ deposition for cu hillock suppression In-situ deposition for cu hillock suppression

2006-01-19

2008-09-09

Zarneke, David A (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257SE23161

Reexamination Certificate

active

07423347

ABSTRACT:
A semiconductor interconnect structure having reduced hillock formation and a method for forming the same are provided. The semiconductor interconnect structure includes a conductor formed in a dielectric layer. The conductor includes at least three sub-layers, wherein the ratio of the impurity concentrations in neighboring sub-layers is preferably greater than about two.

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