Hub for testing memory and methods thereof

Details Hub for testing memory and methods thereof Hub for testing memory and methods thereof

2005-10-28

2008-03-11

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S739000

Reexamination Certificate

active

07343533

ABSTRACT:
A hub for testing memory and methods thereof. The hub may include a test block a test block and a transparent mode block. The test block may be configured to generate a pseudo random pattern based on received memory control information and to write the pseudo random pattern to at least one of a plurality of memory devices in the first operating mode. The transparent mode block may be configured to receive the generated pseudo random pattern from the test block, to read the pseudo random pattern from the at least one of the plurality of memory devices in the first operating mode and to compare the generated pseudo random pattern with the read pseudo random pattern. Also, the hub may perform a transparent mode test on at least one memory device of a memory module with a pseudo random data pattern, the pseudo random data pattern based at least in part on memory control information received from a device not included within the memory module.

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Office Action dated Oct. 23, 2007 (received by German associate on Nov. 29, 2007) for corresponding German Application No. 10 2005 051 308.5-55.

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