Semiconductor memory device having reduced leakage current

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S063000, C365S189110, C365S210130

Reexamination Certificate

active

07349240

ABSTRACT:
A static semiconductor memory device includes a memory cell formed in a memory cell region; and a dummy memory cell formed in a dummy memory cell region. The memory cell includes a power supply wiring and a ground wiring which are provided to extend in a direction of a word line; and inverters provided between the power supply wiring and the ground wiring and cross-connected to each other. The dummy memory cell includes first and second wirings respectively corresponding to the power supply wiring and the ground wiring and extending in the direction of the word line; and two sets of a dummy load circuit and a dummy drive transistor, wherein the two sets are connected with the first and second wirings, which are biased to prevent leakage current from flowing.

REFERENCES:
patent: 6977834 (2005-12-01), Onizawa et al.
patent: 7054864 (2006-05-01), Toomey
patent: 61-214559 (1986-09-01), None
patent: 7-176631 (1995-07-01), None
patent: 2004-71118 (2004-03-01), None

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