Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Patent
1997-12-18
2000-07-04
Bowers, Charles
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
438763, 438624, 438631, 438699, 438623, 438760, 438759, 438787, H01L 2131
Patent
active
060838507
ABSTRACT:
The use of HSQ as a dielectric interlayer without cracking is achieved by depositing HSQ on a planarized dielectric layer, such as a silicon oxide derived from TEOS or silane. Embodiments include depositing a first HSQ gap fill layer on a patterned metal layer for gap filling leaving a non-planar upper surface. Depositing a thin layer of silicon oxide and planarizing the upper surface as by CMP, and depositing the HSQ dielectric interlayer on the planarized upper surface of the oxide layer.
REFERENCES:
patent: 5548159 (1996-08-01), Jeng
patent: 5607773 (1997-03-01), Ahlburn et al.
patent: 5665657 (1997-09-01), Lee
patent: 5693566 (1997-12-01), Cheung
patent: 5728630 (1998-03-01), Nishimura et al.
Advanced Micro Devices , Inc.
Bowers Charles
Nguyen Thanh
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