Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-04-04
2008-09-09
Wojciechowicz, Edward (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S279000, C438S301000, C438S303000, C438S592000, C438S286000
Reexamination Certificate
active
07422949
ABSTRACT:
The present invention relates to a high voltage transistor and method of manufacturing the same. The high voltage transistor includes: a channel region which is formed in a semiconductor substrate; a gate insulating film which is formed on the channel region of the semiconductor substrate; a low concentration source region and a low concentration drain region having the channel region interposed therebetween and each being formed in the semiconductor substrate; a high concentration source region which is formed to be spaced away from the channel region by a first distance; a high concentration drain region which is formed to be spaced away from the channel region by a second distance that is larger than the first distance; a gate electrode which has a gate bottom portion interfacing with the gate insulating film over the channel region, and a gate top portion integrated with the gate bottom portion and protruding by a predetermined length from a top of the gate bottom portion to extend over the low concentration drain region; a first metal silicide layer which is formed on the high concentration source region; and a second metal silicide layer which is formed on the high concentration drain region.
REFERENCES:
patent: 5917218 (1999-06-01), Choi et al.
patent: 6071775 (2000-06-01), Choi et al.
patent: 6146952 (2000-11-01), Nariman et al.
patent: 6596599 (2003-07-01), Guo
Jeon Hee-seog
Kim Yong-tae
Yoon Seung-beom
Yu Tae-kwang
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
Wojciechowicz Edward
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