Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-03-08
1999-03-09
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438197, 438948, H01L 2128
Patent
active
058799958
ABSTRACT:
A fourth impurity region having a smaller junction depth than that of the second impurity region, and having a third impurity concentration which is lower than that of the second impurity region is formed between the first impurity region and second impurity region. A fifth impurity region whose junction depth is smaller than that of the second impurity region, and having a third impurity concentration is formed between the first impurity region and second impurity region. Since the intensity of the electric field applied to the drain region is reduced, transistor characteristics are improved. Also, the integration of a semiconductor device is increased by reducing the layout space.
REFERENCES:
patent: 4682404 (1987-07-01), Miller et al.
patent: 4728617 (1988-03-01), Woo et al.
patent: 4746624 (1988-05-01), Cham et al.
patent: 4833097 (1989-05-01), Butler et al.
patent: 4878100 (1989-10-01), McDavid
patent: 5015598 (1991-05-01), Verhaar
patent: 5120668 (1992-06-01), Hsu et al.
patent: 5147814 (1992-09-01), Takeuchi
patent: 5292676 (1994-03-01), Manning
patent: 5427971 (1995-06-01), Lee et al.
patent: 5442215 (1995-08-01), Chae
patent: 5543342 (1996-08-01), Mukai et al.
patent: 5550069 (1996-08-01), Roth
patent: 5578509 (1996-11-01), Fujita
patent: 5604139 (1997-02-01), Codama et al.
S. Wolf & R.N. Tauber "Silicon Processing for the VLSI Era" vol. I, pp. 321-325, 1986.
D.A. Badami et al., IBM Tech. Discl. Bulletin 26(6)(1983)2682 "Tapered photoresist for a doping profile", Nov. 1983.
S. Wolf, "Silicon Processing for the VLSI Era" vol. II, pp. 354-359, Jun. 1990.
Bowers Charles
Samsung Electronics Co,. Ltd.
Sulsky Martin
LandOfFree
High-voltage transistor and manufacturing method therefor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High-voltage transistor and manufacturing method therefor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-voltage transistor and manufacturing method therefor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1320326