High voltage TMOS semiconductor device with low gate charge...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S329000, C257SE29198

Reexamination Certificate

active

08030153

ABSTRACT:
A TMOS device (10) is formed using a semiconductor layer (16) of a first type. First and second regions (62,64) of the second type are formed in the semiconductor layer and are spaced apart. A third region (68) is formed in the semiconductor layer by implanting. The third region is between and contacts the first and second doped regions, is of the second conductivity type, and is less heavily doped than the first and second doped regions. A gate stack (67) is formed over a portion of the first doped region, a portion of the second doped region, and the third doped region. By implanting after forming the gate stack, fourth and fifth regions (98,100) of the first type are formed in interior portions of the first and second doped regions, respectively. The third region being of the same conductivity type as the first and second regions reduces Miller capacitance.

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