Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2006-12-19
2010-10-12
Elamin, Abdelmoniem (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S401000, C711S100000, C711S154000, C365S189011, C365S190000
Reexamination Certificate
active
07814359
ABSTRACT:
A high-speed double or quadrature data rate interface semiconductor device and a method thereof are provided. A transmitter (e.g., a data transmitting semiconductor device) for high-speed data transmission transmits a first strobe signal and a second strobe signal, which have a phase difference of 90 degrees there-between, a first group (byte of) data, and a second group (byte of) data. The transmitter adjusts the phase of at least one of the first and second strobe signals based on phase-error information fed back from a receiver and then transmits the phase-adjusted strobe signal to the receiver. The receiver receives the first and second strobe signals from the transmitter and receives the first group (byte of) data and the second group (byte of) data using the first and second strobe signals. The receiver does not require a phase-locked loop (PLL) or a delay-locked loop (DLL), thereby decreasing the circuit area and power consumption of the receiver. In addition, since source synchronization is realized using a strobe signal, phase noise can be efficiently removed.
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Bae Seung-Jun
Jang Seong-Jin
Park Kwang-Il
Shin Sang-Woong
Song Ho-Young
Elamin Abdelmoniem
F.Chau & Associates LLC
Samsung Electronics Co,. Ltd.
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