High speed NOR gate with small output voltage swings

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

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Details

326 33, 326 34, 326108, H03K 1730

Patent

active

054324637

ABSTRACT:
A high speed multiple input NOR gate. In an illustrative embodiment, the invention includes a plurality of pull-down transistors for providing an output signal. A pull-up transistor is coupled to the plurality of pull-down transistors for providing a drive current. A regulator is coupled to the pull-up transistor for regulating the drive current in response to temperature and power supply voltage variation so as to maintain the speed of the output signal during a low-to-high transition of the output signal. In specific implementations, the NOR gate is designed to regulate the output signal so that a high level or a low level thereof is maintained at a predetermined level. The several embodiments disclosed provide: 1) a high speed NOR gate that offers high speed performance on both the low-to-high and high-to-low transitions; 2) a high speed NOR gate for which voltage swings on the input circuits thereof are minimal; 3) a high speed NOR gate with pull-up current temperature and voltage compensation for improved performance on the low-to-high transition of the output; and 4) a high speed NOR gate using a feedback technique to regulate and limit the logic low voltage on the output such that this level has minimal variation independent of the number of the NOR inputs held in the logic high state.

REFERENCES:
patent: 4408474 (1983-09-01), Dingwall
patent: 4491747 (1985-01-01), Shimizu
patent: 4645952 (1987-02-01), van Tran
patent: 4728827 (1988-03-01), Woo
patent: 4763021 (1988-08-01), Stickel
patent: 5264741 (1993-11-01), Srinivasan et al.
patent: 5329185 (1994-02-01), Cooperman et al.

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