Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1981-12-28
1984-08-21
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365230, G11C 700
Patent
active
044674546
ABSTRACT:
In an external memory system having a program mode for controlling a read/write operation of a memory of the external memory system by a central processing unit and having a direct memory access mode permitting a direct access to a main memory, there are provided first and second location address registers. The memory addressing is performed by the first location address register in the direct memory access mode and by the second location address register in the program mode, whereby it is possible to execute the read/write operation with the memory of the external memory system in the program mode during a burst timing interval during data transfer in the direct memory access mode, thus permitting high-efficiency data processing.
Kurosu Hirohiko
Nagata Satoshi
Satake Yasuo
Fujitsu Limited
Popek Joseph A.
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