Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2009-01-09
2010-12-21
Nguyen, Dao H (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S240000, C438S258000, C438S266000, C438S267000, C257S321000, C257S635000, C257SE21584, C257SE29165, C257SE29309
Reexamination Certificate
active
07855114
ABSTRACT:
A memory device may include a source region and a drain region formed in a substrate and a channel region formed in the substrate between the source and drain regions. The memory device may further include a first oxide layer formed over the channel region, the first oxide layer having a first dielectric constant, and a charge storage layer formed upon the first oxide layer. The memory device may further include a second oxide layer formed upon the charge storage layer, a layer of dielectric material formed upon the second oxide layer, the dielectric material having a second dielectric constant that is greater than the first dielectric constant, and a gate electrode formed upon the layer of dielectric material.
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Wei Zheng et al., co-pending U.S. Appl. No. 11/086,310, filed Mar. 23, 2005, entitled “High K Stack for Non-Volatile Memory”.
Joong Jeon et al., co-pending U.S. Appl. No. 11/049,855, filed Feb. 4, 2005 entitled “Non-Volatile Memory Device With Improved Erase Speed”.
Randolph Mark
Shiraiwa Hidehiko
Zheng Wei
Harrity & Harrity LLP
Nguyen Dao H
Spansion LLC
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