Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-12-18
2000-07-25
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438622, 438624, 438631, 438637, 438958, 438626, H01L 214763
Patent
active
060936355
ABSTRACT:
Borderless vias are formed in electrical connection with a lower metal feature of a metal pattern gap filled with HSQ. Heat treatment in an inert atmosphere is conducted before filling the through-hole to outgas water absorbed during solvent cleaning of the through-hole, thereby reducing via void formation and improving via integrity.
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Chan Simon S.
Huang Richard J.
Tran Khanh
You Lu
Advanced Micro Devices , Inc.
Niebling John F.
Zarneke David A.
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