HF vapor phase wafer cleaning and oxide etching

Details HF vapor phase wafer cleaning and oxide etching HF vapor phase wafer cleaning and oxide etching

2000-02-04

2004-05-25

Mills, Gregory (Department: 1763)

Etching a substrate: processes

Gas phase etching of substrate

Etching vapor produced by evaporation, boiling, or sublimation

C438S743000

Reexamination Certificate

active

06740247

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to processes for cleaning silicon substrates such as silicon wafers and for etching oxide layers on such wafers, and more particularly relates to wafer cleaning and oxide etching techniques employing hydrofluoric acid.
The effectiveness of cleaning processes for removing contamination from silicon wafers employed for microfabrication is growing ever more important as the critical size of microfabricated electronic devices shrink. Wafer contamination is generally introduced from wafer production and packaging, from exposure to the ambient, and from human exposure during processing, and can consist of particles, organic residue, adsorbed metal ions, and other contaminants. The vital role of wafer cleaning in microfabrication processing is evidenced by the fact that about one-third of the total number of steps in a given microfabrication process are cleaning steps.
To maximize microfabrication production yield, cleaning processes are relied on to remove wafer contamination without damaging or consuming the wafer and without introducing further contamination to the wafer. For silicon wafers, such cleaning typically includes removal of the native silicon dioxide layer, referred to here as a native oxide layer, for brevity, that is generally present on the wafer. Metal and other contamination can be trapped in this native oxide layer and would critically contaminate high-temperature processing equipment. Removal of the native oxide layer is therefore generally always carried out as an integral wafer cleaning process before any high-temperature processing a wafer.
Traditionally, silicon wafers are cleaned by way of aqueous phase cleaning processes that typically employ, e.g., acids, bases, and mixtures of various chemicals. Historically, such an aqueous phase process has been effective at removing contaminants and removing the native oxide layer. Now, however, as microelectronic features shrink to the sub-micron regime, as the aspect ratio of wafer topology greatly increases, and as the number of microelectronic metal interconnect layers is increased, traditional aqueous cleaning processes are less effective or completely ineffective. Thorough drying of rinse solutions from around and in small or high aspect ratio features can be difficult and can result in trapping of contamination at those features. Furthermore, new combinations of microelectronic materials and new exotic microelectronic materials can be adversely affected by aqueous cleaning chemicals that historically were considered benign to more conventional materials.
Aside from structure and materials considerations, it is found that microfabrication process facilities are under increasing pressure to reduce the volume of waste chemicals they generate. Wafer cleaning processes contribute substantially to this waste volume. As environmental regulations are increased, the pressure to reduce or eliminate aqueous wafer cleaning waste will also increase.
In response to many of these issues, the use of hydrofluoric acid (HF) vapor for cleaning silicon wafers, including etching of native oxide, and etching of thicker silicon dioxide layers, has been extensively studied. Typically, HF vapor wafer cleaning and etching is carried out in an in situ environment and employs vapor phase HF and, e.g., vapor or liquid water, an alcohol, and other optional components such as carrier gases. HF vapor etching is found to selectively etch oxide over silicon and to remove at least partially wafer contaminants.
HF vapor cleaning and etching has not been fully adopted for cleaning and etching steps in microelectronic fabrication processing, however, due to unwanted contamination that can be introduced by a vapor process itself, and due to a lack of clear understanding of the mechanisms and operational regimes of vapor-based wafer cleaning and etching, with a resulting inability to precisely control the processes. For example, it has been found that under some process conditions, liquid phase condensation of vapor phase reactants on a wafer can occur during a cleaning or etch process, and that high concentrations of reaction products in this condensed phase can result. If such reaction products do not desorb into the vapor phase when the process is stopped, they can produce particulate residue on the wafer. This residue contamination of the wafer is often characterized by diffuse light scattering, referred to as “haze” on the wafer surface. Typically, a post-vapor clean aqueous rinse step is required to remove any such residue contamination. This rinsing both consumes water and produces aqueous waste volume that the vapor process was motivated to do away with, and eliminates the ability to carry out an “all-dry” in situ process that is desirable for multi-process integration. But more fundamentally, the introduction of additional contaminants by a vapor process intended for contaminant removal renders the vapor process inefficient and ineffectual.
It has also been found that under some process conditions, multilayer adsorption, rather than condensation, of vapor phase reactants can occur on a wafer during a cleaning or etch process, and that localized thick multilayer reaction product regions can result. Such a condition is particularly apt to occur, for multilayer process conditions, during etching of a relatively thicker silicon dioxide layer. The reactant multilayer regions can accelerate the local etch rate and produce a localized piling up of reaction products, leading to pitting of the oxide layer being etched. Like the residue particulate formation discussed above, this oxide pitting is commonly characterized as “haze” on the etched layer surface. The lack of etch control of which this pitting is a symptom that is generally considered to disqualify the vapor etch process for microfabrication steps requiring high-precision.
Beyond the particular concerns of lack of process uniformity control and unwanted process contamination described above, it has historically been considered extremely difficult to guarantee HF vapor process repeatability or predictability with respect to starting wafer conditions such as contamination conditions. These various concerns, taken together, are generally considered to outweigh the potential benefits that HF vapor cleaning and etching might bring to microfabrication process efficacy, precision, economics, and environmental regulatory compliance.
SUMMARY OF THE INVENTION
The invention provides HF vapor process conditions that can be precisely controlled with a high degree of reproducibility for a wide range of starting wafer conditions. These HF vapor processes of the invention can be employed in accordance with the invention for etching oxide on a semiconductor substrate, for cleaning a contaminant on a semiconductor substrate, for removing etch residue from a metal structure on a semiconductor substrate, and for cleaning a metal contact region of a semiconductor substrate, among other applications.
In the HF vapor process method of the invention, a semiconductor substrate having oxide, a contaminant, metal etch residue, or a contact region to be processed is exposed to hydrofluoric acid vapor and water vapor in a process chamber held at temperature and pressure conditions that are controlled to form on the substrate no more than a sub-monolayer of etch reactants and products produced by the vapor as the substrate is processed by the vapor.
The sub-monolayer HF vapor process regime is defined in accordance with the invention to proceed under conditions wherein no more than about 95% monolayer coverage of the substrate surface occurs. This sub-monolayer coverage results in highly uniform, reproducible, and predictable etch and cleaning rates, such that the process is particularly robust for manufacturing scenarios, where, e.g., the oxide to be processed consists of silicon dioxide and the substrate to be processed consists of a silicon wafer. In the sub-monolayer process regime of the invention, the preferable etch rate of oxide is no more than about 10 Å/m

Affiliated with

Also associated with

Rating

HF vapor phase wafer cleaning and oxide etching does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with HF vapor phase wafer cleaning and oxide etching, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and HF vapor phase wafer cleaning and oxide etching will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3249948