Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-04-22
2010-10-19
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S680000, C438S510000, C257SE21170, C257SE21267, C257SE21311, C257SE21632
Reexamination Certificate
active
07816200
ABSTRACT:
The present invention generally includes a method and an apparatus for depositing both a high k layer and a capping layer within the same processing chamber by coupling gas precursors, liquid precursors, and solid precursors to the same processing chamber. By coupling gas precursors, liquid precursors, and solid precursors to the same processing chamber, a high k dielectric layer, a capping layer for a PMOS section, and a different capping layer for a NMOS may be deposited within the same processing chamber. The capping layer prevents the metal containing electrode from reacting with the high k dielectric layer. Thus, the threshold voltage for the PMOS and NMOS may be substantially identical.
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Applied Materials Inc.
Nhu David
Patterson & Sheridan LLP
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