Ground plane for exposed package

Details Ground plane for exposed package Ground plane for exposed package

2005-04-05

2005-04-05

Thai, Luan (Department: 2829)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S691000, C257S784000, C257S666000

Reexamination Certificate

active

06876069

ABSTRACT:
A new design is provided for the design of a leadframe of a semiconductor package. A ground plane is added to the design of the leadframe, the ground frame is located between the leadframe and the die attach paddle over which the semiconductor device is mounted.

REFERENCES:
patent: 5434750 (1995-07-01), Rostoker et al.
patent: 5723899 (1998-03-01), Shin
patent: 6096163 (2000-08-01), Wensel
patent: 6284571 (2001-09-01), Corisis et al.
patent: 6300673 (2001-10-01), Hoffman et al.
patent: 6437427 (2002-08-01), Choi
patent: 6703696 (2004-03-01), Ikenaga et al.

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